Comtech EF Data SDM-309B Dokumentacja Strona 139

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SDM-309B Satellite Modem Theory of Operation
MN/U-SDM309B Rev. # 5-5–15
7/8 rate. The "de-puncture" pattern is the same as the "puncture pattern used in the
encoder. A set of "branch metric" values is then computed for each of the received
symbol pairs, related to the probability that the received symbol pair was actually
transmitted as one of the four possible symbol pairs. The "branch metrics" are then
processed by the add-select-compare (ASC) computer. The ASC computer makes
decisions about the most probable transmitted symbol stream by processing the current
branch metrics with the state metrics computed for the sixty-four previous decoder
inputs. The results of the ASC computer are stored in memory called path memory. The
path memory is 80 states in depth. The path with the maximum metric is designated as
the survivor path and its data is used for output. The difference between the minimum
and the maximum path metric’s is used as the means of determining synchronization of
the decoder. The output data may then be descrambled and differentially decoded. Both
of these processes are optional and may be selected by the user locally or remotely. The
data out of the differential decoder is sent to the interface card for formatting and output.
The synchronization signal is used for Lock Detect and sent to the M & C.
The Raw BER count is generated from the minimum and maximum metric’s and sent to
the M & C for further processing
5.3 Demodulator
5.3.1 General Description
The modem Demodulator card is a 10.25" x 14" card (Figure 5-9) that fits in the lower
left slot of the modem chassis. Its function is to accept a desired QPSK modulated signal
in the 50 to 90 MHz or 100 to 180 MHz range and convert it to filtered baseband in-
phase and quadrature signals which are then quantized and output from the card.
Several subSections make up the card. These include:
1) The AGC Amplifier
2) The Quadrature Demodulator
3) The RF Synthesizer
4) The Nyquist Filter
5) The Baseband Amplifier
6) The Soft Decision Interface
A block diagram of the Demodulator is shown in Figure 5-10. A detailed description of
the subSections appears in Section 5.3.3
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